In a groundbreaking exclusive interview with AMD’s Chief Technology Officer Mark Papermaster, TSMC’s co-chief operating officer Mi Yujie revealed key insights into the future of advanced process development. Mi Yujie emphasized the continuous evolution of advanced manufacturing and stressed the significance of collaboration with customers in achieving successful outcomes.
Mi Yujie highlighted the potential for further development of processes below 2 nanometers, with a focus on integrating new technologies in each new generation of manufacturing. TSMC’s adoption of a dual R&D team system allows for a more structured approach to launching the latest process technology, despite longer development cycles of 5 to 7 years for each generation.
Looking ahead, TSMC is exploring cutting-edge technologies such as silicon photonics, enhancing partnerships with DRAM memory manufacturers, and investigating the implementation of 3D stacking into transistor-level structures. The company is gearing up to introduce more advanced GAA technology transistors at the 2nm node, with mass production slated for 2025.
During the interview, Mark Papermaster underscored the shift towards a more collaborative approach between foundries and fabless IC design companies, emphasizing the importance of Design-Technology Co-Optimization (DTCO). Mi Yujie echoed this sentiment, highlighting the crucial role of DTCO in identifying valuable process technology development routes and optimizing chip design for enhanced performance, energy efficiency, and chip area.
Furthermore, Mi Yujie discussed the growing impact of artificial intelligence in the high-performance computing (HPC) industry, foreseeing a prosperous future driven by advancements in AI technology. As the HPC sector continues to evolve, it is poised to surpass the PC and smartphone industries in terms of growth and innovation.
Overall, the interview provided valuable insights into TSMC’s commitment to driving innovation in advanced process development and the pivotal role of collaboration and technology optimization in achieving success in the semiconductor industry.