Preparing for Backside Power Delivery: Intense Tech Battle Among TSMC, Intel, and Samsung

TSMC, Intel, and Samsung are all making significant advancements in chip technology to improve efficiency and performance. TSMC recently introduced its A16 process node, which integrates Super PowerRail architecture and nanosheet transistors to create faster and more efficient data center processors. By implementing backside power supply, TSMC aims to reduce power loss and improve chip efficiency.

Intel is also stepping up its game with the introduction of PowerVia, a backside power delivery solution that saves space on the chip surface and improves voltage droop and frequency benefits. The PowerVia technology is set to be integrated into Intel Foundry Services, enhancing product efficiency and performance for customer-designed chips.

Samsung is not far behind, planning to implement its SF1.4 process by 2027, incorporating backside power delivery technology to reduce wafer area consumption and improve overall performance. By reducing wiring length and resistance, Samsung’s technology aims to lower power consumption and enhance power transmission conditions.

These advancements in chip technology are crucial as the industry moves towards smaller and denser transistors. By addressing power loss and improving efficiency through innovative solutions like backside power supply, semiconductor companies are paving the way for faster, more efficient, and more powerful chips. Stay tuned for more updates on the latest developments in chip technology from these leading companies.